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교수 프로필
김병섭
교수Background
학력
2004.09 ~ 2010.02
Massachusetts Institute of Technology (MIT) (박사-전자전기)
2002.09 ~ 2004.09
Massachusetts Institute of Technology (MIT) (석사-전자전기)
1997.03 ~ 2000.08
포항공과대학교 (학사-전자전기)
Experience
주요경력
2010~2012
INTEL CORPORATION
2010.03 ~ 2011.10
INTEL CORPORATION
Focus
전문분야
Publications
학술지
국제전문학술지
A SelfSupervised Learning of a Foundation Model for Analog Layout Design Automation, IEEE Transactions on Circuits and Systems I Regular Papers, , 73, - (2026 )
FastPrototyping of Readout Circuits for FeFETBased Neuromorphic CIM Macro With MeasurementDriven Device Model Generator and Readout Layout Automation, IEEE Access, , 14, 129968-129984 (2026 )
An OnChip LowCost Averaging Digital Sampling Scope for 80GSs Measurement of Wireline Pulse Responses, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, , 33, 1432-1436 (2025 )
A Fast Design Optimization of OnChip Equalizing Links Using Particle Swarm Optimization, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, , 33, 1-9 (2025 )
Guest Editorial Introduction to the Special Section on the 2024 Asian SolidState Circuits Conference (ASSCC), IEEE Journal of SolidState Circuits, , 60, 3460-3463 (2025 )
Compact SingleEnded Transceivers Demonstrating Flexible Generation of 1NRate Receiver FrontEnds for ShortReach Links, IEEE Transactions on Circuits and Systems I Regular Papers, , 71, 373-382 (2024 )
A LayouttoGenerator Conversion Framework with Graphical User Interface for Visual Programming of Analog Layout Generators, IEEE Access, , 12, 125942-125954 (2024 )
3 x 16 Gbs Compact SingleEnded PAM4 Transmitters With InverterBased Crosstalk Compensation for Memory Interfaces, IEEE Transactions on Circuits and Systems II Express Briefs, , 71, 4884-4888 (2024 )
A SingleEnded InverterBased AdditionOnly FeedForward Equalization Transmitter, IEEE JOURNAL OF SOLIDSTATE CIRCUITS, , 59, 3741-3751 (2024 )
Review on Resistive Termination Techniques Driven by Wireline Channel Behaviors, IEEE Open Journal of the SolidState Circuits Society, , 4, 305-317 (2024 )
An OnChip LowCost Averaging Digital Sampling Scope for 80GSs Measurement of Wireline Pulse Responses, IEEE Transactions on Very Large Scale Integration VLSI Systems, , , 1-5 (2024 )
A Speculative DivideandConquer Optimization Method for Large AnalogMixedSignal Circuits A HighSpeed FFE SST Transmitter Example, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, , 31, 622-635 (2023 )
A 20GbsPin Compact SingleEnded DCCLess DECS Transceiver With CDRLess RX FrontEnd for OnChip Links, IEEE Journal of SolidState Circuits, , 58, 3253-3265 (2023 )
A Compact SingleEnded InverterBased Transceiver With Swing Improvement for ShortReach Links, IEEE Transactions on Circuits and Systems I Regular Papers, , 69, 3679-3688 (2022 )
A Reflection SelfCanceling Design Technique for Multidrop Memory Interfaces, IEEE Transactions on Components Packaging and Manufacturing Technology, , 12, 1816-1823 (2022 )
A DFEEnhanced PhaseDifference Modulation Signaling for MultiDrop Memory Interfaces, IEEE Transactions on Circuits and Systems II Express Briefs, , 68, 1862-1866 (2021 )
A patterndependent injectionlocked CDR for clockembedded signaling, MICROELECTRONICS JOURNAL, , 96, - (2020 )
A 78Gbs 29pJb SingleEnded Receiver With 20Tap DFE for Highly Reflective Channels, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, , 28, 818-822 (2020 )
LowPower SmallArea InverterBased DSM for MEMS Microphone, IEEE Transactions on Circuits and Systems II Express Briefs, , 67, 2392-2396 (2020 )
An 18Gbs NRZ Transceiver with a ChannelIncluded 2UI ImpulseResponse Filtering FFE and 1Tap DFE Compensating up to 32dB Loss, IEEE Transactions on Circuits and Systems II Express Briefs, , , - (2020 )
A 78 Gbspin 196 pJb Transceiver With PhaseDifferenceModulation Signaling for Highly Reflective Interconnects, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS IREGULAR PAPERS, , 67, 2114-2127 (2020 )
A Body Channel Communication Technique Utilizing Decision Feedback Equalization, IEEE Access, , 8, 198468-198481 (2020 )
Fully differential ROIC for SNR enhancement by using a MEMS microphone pair with a differential AC bias and a highvoltage DC bias, IEIE Transactions on Smart Processing and Computing, , 9, 405-412 (2020 )
Parallel Branching of Two 2DIMM Sections With WriteDirection Impedance Matching for an 8Drop 64Gbs SDRAM Interface, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, , 9, 336-342 (2019 )
A Simple LowCost ElectricContactAssisted Alignment Method for Die Stacking on an Interposer or a Printed Circuit Board, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, , 9, 367-374 (2019 )
Impact of Line Mismatch on TwoWire Deembedding Methods in Early Characterization of Emerging Interconnects, IEEE Transactions on Components Packaging and Manufacturing Technology, , 9, 905-912 (2019 )
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS IREGULAR PAPERS, , 66, 3077-3088 (2019 )
An ultrasonic scanner to probe 3D finger skin structures for biometric recognition, IEIE Transactions on Smart Processing and Computing, , 8, 161-169 (2019 )
A Code Inversion Encoding Technique to Improve Read Margin of A CrossPoint Phase Change Memory, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, , 27, 1811-1818 (2019 )
Analogdigital Mixedmode 10tap TomlinsonHarashima Precoding Equalizer for Singleended Highspeed Transmitter, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 19, 461-469 (2019 )
A MultilayerLearning CurrentMode Neuromorphic System With AnalogError Compensation, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, , 13, 986-998 (2019 )
A 192pW Voltage Reference Generating Bandgap Vth With Process and Temperature Dependence Compensation, IEEE JOURNAL OF SOLIDSTATE CIRCUITS, , 54, 3281-3291 (2019 )
A TimeBased Receiver With 2Tap Decision Feedback Equalizer for SingleEnded Mobile DRAM Interface, IEEE JOURNAL OF SOLIDSTATE CIRCUITS, , 53, 144-154 (2018 )
An Onchip Learning Neuromorphic Autoencoder with CurrentMode Transposable Memory Read and Virtual Lookup Table, IEEE Transactions on Biomedical Circuits and Systems, , 12, 161-170 (2018 )
An 846dBSNDR and 982dBSFDR ResidueIntegrated SAR ADC for LowPower Sensor Applications, IEEE JOURNAL OF SOLIDSTATE CIRCUITS, , 53, 404-417 (2018 )
Design of Digital CMOS Neuromorphic IC with Currentstarved SRAM Synapse for Unsupervised Stochastic Learning, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 18, 65-77 (2018 )
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching, IEEE Journal of SolidState Circuits, , 53, 1780-1792 (2018 )
An Approximate ClosedForm Transfer Function Model for Multiconductor Transmission Lines, IEEE Transactions on Circuits and Systems II Express Briefs, , 65, 1199-1203 (2018 )
A Study on Bandgap Reference Circuit With LeakageBased PTAT Generation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, , 26, 2310-2321 (2018 )
A Search Algorithm for the Worst Operation Scenario of a CrossPoint PhaseChange Memory Utilizing Particle Swarm Optimization, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, , 26, 2591-2598 (2018 )
A Phase-Interpolator based Fractional-Counter for All Digital Fractional-N Phase-Locked Loop, IEEE Transactions on Circuits and Systems-II, , 64, 249-253 (2017 )
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 interface, IEEE Transactions on Very Large Sale Integration SYSTEMs, , 25, - (2017 )
A 250μW 24GHz FastLock FractionalN Frequency Generation for UltraLowPower Applications, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS IIEXPRESS BRIEFS, , 64, 106-110 (2017 )
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and LUT for Non-Uniform ADC-Sample-Clock Generation, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, , 11, 87-97 (2017 )
Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAMCircuit Coevaluation, IEEE Transactions on Very Large Scale Integration Systems, , 25, 1821-1830 (2017 )
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, , 25, 2402-2410 (2017 )
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS IIEXPRESS BRIEFS, , 64, 1067-1071 (2017 )
A SelfBiased CurrentMode Amplifier with an Application to 10bit Pipeline ADC, IEEE Transactions on Circuits and Systems I Regular Papers, , 64, 1706-1717 (2017 )
A LowPower Wide DynamicRange Current Readout Circuit for IonSensitive FET Sensors, IEEE Transactions on Biomedical Circuits and Systems, , 11, 523-533 (2017 )
A PhaseInterpolator based FractionalCounter for All Digital FractionalN PhaseLocked Loop, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS IIEXPRESS BRIEFS, , 61, 249-253 (2017 )
AllSynthesizable CurrentMode Transmitter Driver for USB20 interface, EEE Transactions on Very Large Scale Integration (VLSI), , 25, 788-792 (2017 )
A SingleChip 64Channel Ultrasound RXBeamformer Including Analog FrontEnd and an LUT for NonUniform ADCSampleClock Generation, IEEE Transactions on Biomedical Circuits and Systems, , 11, 87-97 (2017 )
An ECG monitoring system using android smart phone, 2016 IEEE International Conference on Consumer ElectronicsAsia ICCEAsia 2016, , , - (2017 )
A lowpower LDO circuit with a fast load regulation, 2016 IEEE Asia Pacific Conference on Circuits and Systems APCCAS 2016, , , 47-49 (2017 )
Read margin analysis in an ReRAM crossbar array, 2016 IEEE Asia Pacific Conference on Circuits and Systems APCCAS 2016, , , 473-475 (2017 )
A CoefficientErrorRobust FeedForward Equalizing Transmitter for EyeVariation and Power Improvement, IEEE Journal of SolidState Circuits, , 51, - (2016 )
A Reconfigurable and Portable Highly Sensitive Biosensor Platform for ISFET and Enzymebased Sensors, IEEE Sensors, , 16, 4443-4451 (2016 )
A SingleEnded Parallel Transceiver With FourBit FourWire FourLevel Balanced Coding for the PointtoPoint DRAM Interface, IEEE JOURNAL OF SOLIDSTATE CIRCUITS, , 51, 1890-1901 (2016 )
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: Regular Papers, , , - (2016 )
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , , - (2016 )
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization, IEEE Transactions on Circuits and Systems-I: Regular Papers, , , - (2016 )
A SNREnhanced MutualCapacitive TouchSensor ROIC Using an Averaging With Three Specific TX Frequencies a Noise Memory and a Compact Delay Compensation Circuit, IEEE Sensors, , 16, - (2016 )
AllSynthesizable 5PhaseLocked Loop for USB 20, Journal of Semiconductor Technology and Science, , 16, 352-358 (2016 )
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, , 62, 1335-1344 (2015)
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer, IEEE Transactions on Biomedical Circuits and Systems, , 9, 138-151 (2015)
EMI Issues in Pseudo-Differential Signaling for SDRAM Interface, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 455-462 (2015)
An Adaptive-Bandwidth Referenceless CDR with Small-area Coarse and Fine Frequency Detectors, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 404-416 (2015)
An In-Band Noise Filtering 32-tap FIR-Embedded Delta Sigma Digital Fractional-N PLL, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 342-348 (2015)
An OTA with Positive Feedback Bias Control for Power Adaptation Proportional to Analog Workloads, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 326-333 (2015)
Cost-Efficient and Automatic Large Volume Data Acquisition Method for On-Chip Random Process Variation Measurement, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 184-193 (2015)
An Adaptive Equalizer for High-Speed Receiver using a CDR-Assisted All-Digital Jitter Measurement, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 155-167 (2015)
Analytical Formulas for Tradeoff Among Channel Loss, Length, and Frequency of RC- and LC-Dominant Single-Ended Interconnects for Fast Equalized Link Tradeoff Estimation, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, , 5, 1497-1506 (2015)
An LCD-VCOM-Noise Resilient Mutual-Capacitive Touch-Sensor IC Chip With a Low-Voltage Driving Signal, IEEE SENSORS JOURNAL, , 15, 4595-4602 (2015)
The Oscillation Frequency of CML-based Multipath Ring Oscillators, Journal of Semiconductor Technology and Science, , 15, 671-677 (2015)
A Single-Stage 37 dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Medical Imaging, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 14, 579-587 (2014)
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 987-991 (2014)
A 0.5-V, 1.47-mu W 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 840-844 (2014)
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 49, 2618-2630 (2014)
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, , 61, 3034-3043 (2014)
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 481-485 (2014)
Current-Mode Transceiver for Silicon Interposer Channel, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 49, 2044-2053 (2014)
Verilog Modeling of Transmission Line for USB 2.0 High-Speed PHY Interface, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 14, 463-470 (2014)
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, , 8, 799-809 (2014)
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier, IEEE Trans. on Circuits and Systems-II, , 60, 142-146 (2013)
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 60, 91-95 (2013)
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation, IEEE Journal of Solid-State Circuits, , 48, 2118-2127 (2013)
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL, IEEE Journal of Solid-State Circuits, , 48, 2795-2804 (2013)
A Channel Model of Scaled RC-dominant Wires for High-Speed Wireline Transceiver Design, Journal of Semiconductor Technology and SCience, , 13, 482-491 (2013)
A 1.9-GHz Fractional-N Digital PLL With Subexponent Delta Sigma TDC and IIR-Based Noise Cancellation, IEEE Transaction on circuits and Systems II, , 59, 721-725 (2012)
An Energy-efficient Equalized Transceiver for RC-dominant Channels, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 45, 1186-1197 (2010)
A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 44, 3526-3538 (2009)
Characterization of Equalized and Repeated Interconnects for NoC Applications, IEEE DESIGN & TEST OF COMPUTERS, , 25, 430-439 (2008)
A Fast Design Optimization of OnChip Equalizing Links Using Particle Swarm Optimization, IEEE Transactions on Very Large Scale Integration VLSI Systems, , , - (0020 )
일반학술지
An Integrated Potentiostat, IEEE Transactions on Circuits and Systems II: Express Briefs, , , - (2017 )
An Integrated Potentiostat, IDEC Journal of Integrated Circuits and Systems, , , - (2017 )
고속 System-in-Package 인터커넥트 기술 동향, IDEC Newsletter, , 192, 10-13 (2013)
국내전문학술지
A 6Gbs Transceiver Design with PhaseDifference Modulation Signaling for Multidrop DRAM Interface, IDEC Journal of Integrated Circuits and Systems, , 8, 6-10 (2022 )
Conference
학술회의논문
A 0.4 V Driving Multi-Touch Capacitive Sensor with the Driving Signal Frequency set to (n+0.5) Times the Inverse of the LCD VCOM Noise Period, IEEE 2014 ISCAS, 0, 0, – (2014)
A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface, INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, 0, 0, – (2014)
Full-speed USB 2.0 device용 Link및 Application Layer 칩, 대한전자전기공학회 추계종합학술대회, 0, 0, – (2013)
All-digital USB 2.0 device Full-speed PHY 칩, 대한전자공학회 하계학술대회, 0, 0, – (2013)
Review A Speculative DivideandConquer Optimization Method for Large AnalogMixedSignal Circuits, Proceedings International SoC Design Conference 2023 ISOCC 2023, , 0, 139-140 (2023)
A Layout Generator of Latch FlipFlop and Shift Register for HighSpeed Links, 2022 19TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), , 0, 19-20 (2022)
A Fast Eye Size Evaluation Method for High Speed Signal, 2022 19TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), , 0, 396-397 (2022)
A Costefficient FPGAbased Embedded System for Biosensor Platform, 2022 19TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), , 0, 67-68 (2022)
A 50 Mbs Full HBC TRX with Adaptive DFE and VariableInterval 3x Oversampling CDR in 28nm CMOS Technology for A 75 cm Body Channel Moving at 075 Cyclesec, ESSCIRC 2022 IEEE 48th European Solid State Circuits Conference Proceedings, , 0, 213-216 (2022)
A 20 Gbspin 118pJb 1149um2 SingleEnded Inverterbased 4tap AdditionOnly FeedForward Equalization Transmitter with Improved Robustness to Coefficient Errors in 28nm CMOS, , , 0, - (2022)
A 20Gbspin 00024mm2 SingleEnded DECS TRX with CDRless SelfSlicingAutoDeserialization to Improve Tolerance on Duty Cycle Error and RX Supply Noise for DCCCDRless ShortReach Memory Interfaces, , , 0, - (2022)
A 143nW GlucoseMonitoring Smart Contact Lens IC with a DualMode Transmitter for WirelessPowered Backscattering and RFRadiated Transmission Using a Single Loop Antenna, A 143nW GlucoseMonitoring Smart Contact Lens IC with a DualMode Transmitter for WirelessPowered Backscattering and RFRadiated Transmission Using a Single Loop Antenna, , 0, - (2019)
A 143nW GlucoseMonitoring Smart Contact Lens IC with a DualMode Transmitter for WirelessPowered Backscattering and RFRadiated Transmission Using a Single Loop Antenna, IEEE Symposium on VLSI Circuits Digest of Technical Papers, , 0, C294-C295 (2019)
A 192pW Hybrid BandgapVth Reference with Process Dependence Compensated by a DimensionInduced SideEffect, A 192pW Hybrid BandgapVth Reference with Process Dependence Compensated by a DimensionInduced SideEffect, , 0, - (2019)
A Ruleofthumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design, A Ruleofthumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design, , 0, - (2018)
Experimental Verification of a Simple Intuitive and Accurate ClosedForm Transfer Function Model for Diverse HighSpeed Interconnects, Proceedings International SoC Design Conference 2018 ISOCC 2018, , 0, 239-240 (2018)
A 12Gbs ACCoupled FFE TX with Adaptive Relaxed Impedance Matching Achieving Adaptation Range of 3575Ω Z 0 and 30550Ω R RX, 2018 IEEE Asian SolidState Circuits Conference ASSCC 2018 Proceedings, , 0, 209-212 (2018)
A 12Gbs ACCoupled FFE TX With Adaptive Relaxed Impedance Matching Achieving Adaptation Range of 3575Ω Z0 and 30550Ω RRX, IEEE Asian SolidState Circuits Conference Digest of Technical Papers Digest of Technical Papers, , 0, - (2018)
A Ruleofthumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design, Proceedings International SoC Design Conference 2018 ISOCC 2018, , 0, 17-18 (2018)
A 78Gbspin 196pJb Compact SingleEnded TRX and CDR with PhaseDifference Modulation for Highly Reflective Memory Interfaces, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2018)
A 78Gbspin 196pJb compact singleended TRX and CDR with phasedifference modulation for highly reflective memory interfaces, Digest of Technical Papers IEEE International SolidState Circuits Conference, , 0, 272-274 (2018)
A 166pJb 150Mbs Body Channel Communication Transceiver with Decision Feedback Equalization Improving 200x Area Efficiency, Proceedings of ACM Asia and Pacific Design Automation Conference (ASPDAC), , 0, - (2018)
A 166pJb 150Mbs bodychannel communication transceiver with decision feedback equalization improving gt200x area efficiency, Proceedings of the Asia and South Pacific Design Automation Conference ASPDAC, , 0, 311-312 (2018)
A 10GHz Multipurpose Reconfigurable Builtin SelfTest Circuit for HighSpeed Links, IEEE Asian SolidState Circuits Conference, , 0, - (2017)
A 166pJb 150Mbs Body Channel Communication Transceiver with Decision Feedback Equalization Improving 200x Area Efficiency, IEEE SYMPOSIUM ON VLSI CIRCUITS, , 0, - (2017)
An FFE TX with 38x Eye Improvement by Automatic Impedance Adaptation for Universal Compatibility With Arbitrary Channel and RX Impedances, IEEE SYMPOSIUM ON VLSI CIRCUITS, , 0, - (2017)
A Wide Range Delay Locked Loop for DDR4, , , 0, - (2017)
A CoefficientErrorRobust FFE for a Silicon Interposer Channel, , , 0, - (2017)
A 00047mm2 Highly Synthesizable TDC and DCOLess FractionalN PLL with a Seamless Lock Range of fREF to 1GHz, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2017)
A 93nW AllinOne Bandgap Voltage and Current Reference Circuit, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2017)
A Quadrature Relaxation Oscillator with a ProcessInduced FrequencyError Compensation Loop, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2017)
A timebased receiver with 2tap DFE for a 12Gbspin singleended transceiver of mobile DRAM interface in 08V 65nm CMOS, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2017)
오디오용 쵸퍼 안정화 방식을 이용한 저잡음 증폭기, 대한전자전기공학회 추계종합학술대회, , 0, - (2016)
All Synthesizable 6Gbs VoltageMode Transmitter for Serial Link, IEEE ASIAN SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2016)
An ECG Monitoring System Using Android Smart Phone, IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICSASIA (ICCEASIA), , 0, - (2016)
A LowPower LDO Circuit With A Fast Load Regulation, IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, , 0, - (2016)
All Synthesizable Transmitter Driver and Data Recovery Circuit for USB 20 Interface, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, , 0, - (2016)
Fullspeed USB PHYLINK 소자와 델타모듈레이터 ADC를 이용한 안드로이드 스마트폰용 오실로스코프, , , 0, - (2016)
시리얼 링크를 위한 디지털 합성화 된 다중 위상고정루프, , , 0, - (2016)
A LowEMI FourBit FourWire SingleEnded DRAM Interface by Using A ThreeLevel Balanced Coding Scheme, IEEE SYMPOSIA ON VLSI TECHNOLOGY AND CIRCUITS, , 0, - (2016)
AllSynthesizable 5Phase PhaseLocked Loop, 18TH INTERNATIONAL CONFERENCE ON ELECTRONICS INFORMATION AND COMMUNICATION (ICEIC), , 0, - (2016)
All Synthesizable CurrentMode Transmitter Driver for Serial Link Interface, 18TH INTERNATIONAL CONFERENCE ON ELECTRONICS INFORMATION AND COMMUNICATION (ICEIC), , 0, - (2016)
A reducedsize lookuptable for ADC sampletimes of a singlechip nonuniformsampling digitalbeamformer for ultrasound medical imaging, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, , 0, - (2015)
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design, IEEEACM INTERNATIONAL COMPUTERAIDED DESIGN CONFERENCE, , 0, - (2015)
An Approximate Condition to Avoid Reverse Leakage Current in ReRAM Crossbar Design, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, , 0, - (2015)
A Threshold Voltage Variation Calibration Algorithm for An ISFETBased LowCost pH Sensor System, IEEE SENSORS, , 0, - (2015)
A MutualCapacitive Touch Sensor ROIC Using a PLL to Reduce LCD Noise by Synchronizing ROIC TX Clock to LCD Clock, IEEE SENSORS, , 0, - (2015)
An FPGABased Embedded System for Portable and CostEfficient Biosensing A LowCost Controller for Biomedical Diagnosis, IEEE INTERNATIONAL CIRCUITS AND SYSTEMS SYMPOSIUM, , 0, - (2015)
An Input Pole Tuned Switching Equalization Scheme for HighSpeed Serial Links, IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, , 0, - (2015)
A 35dBLinear Variable Gain Amplifier Circuit of DigitalBeamformer for Ultrasound Medical Imaging, 30TH INTERNATIONAL TECHNICAL CONFERENCE ON CIRCUITS SYSTEMS COMPUTERS AND COMMUNICATIONS (ITCCSCC), , 0, - (2015)
Highspeed USB 20 device 용 Link 및 Data Acquisition System, , , 0, - (2015)
Comprehensive Methodology for ReRAM and Selector Design Guideline of CrossPoint Array, IEEE INTERNATIONAL MEMORY WORKSHOP, , 0, - (2015)
A 29nW bandgap reference circuit, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2015)
EMI issues in pseudodifferential signaling for SDRAM interface, , , 0, - (2015)
A VoltageScalable 10b Pipelined ADC with Current Mode Amplifier, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), , 0, - (2014)
A 04 V Driving MultiTouch Capacitive Sensor with the Driving Signal Frequency set to (n05) Times the Inverse of the LCD VCOM Noise Period, IEEE 2014 ISCAS, , 0, - (2014)
An analogdigitalhybrid singlechip RX beamformer with nonuniform sampling for 2DCMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, , 0, 426-427 (2014)
A 567mW 9Gbs DLLbased referenceless CDR with patterndependent clockembedded signaling for intrapanel interface, INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, , 0, - (2014)
A coefficienterrorrobust FFE TX with 230 eyevariation improvement without calibration in 65nm CMOS technology, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, , 0, 50-51 (2014)
Fullspeed USB 20 device용 Link및 Application Layer 칩, 대한전자전기공학회 추계종합학술대회, , 0, - (2013)
Alldigital USB 20 device Fullspeed PHY 칩, 대한전자공학회 하계학술대회, , 0, - (2013)
RCdominant 채널의 간단한 전달함수 모델을 이용한 RCdominant 인터커넥트 길이와 손실의 Tradeoff 분석, 대한전자공학회, , 0, - (2013)
Microsecond 레벨의 지연시간을 가지는 Voltage Controlled Delay Line, 2012년도 대한전자공학회 하계학술대회 제 35권 1호, , 0, - (2012)
An analytical model of scaled RCdominant wires for highspeed wireline transceiver design, PROCEEDINGS OF INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, , 0, - (2011)
Designing Energyefficient LowDiameter Onchip Networks with Equalized Interconnects, PROCEEDINGS OF HIGH PERFORMANCE INTERCONNECTS, , 0, - (2009)
A Fractionally Spaced Linear Receive Equalizer with VoltagetoTime Conversion, IEEE INTERNATINOAL SYMPOSIUM ON VLSI CIRCUITS DIGEST OF TECHNICAL PAPERS, , 0, - (2009)
A 10Gbs Compact LowPower Serial IO with DFEIIR Equalization in 65nm CMOS, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, , 0, - (2009)
A 4Gbsch 356fJb 10mm Equalized Onchip Interconnect with Nonlinear ChargeInjecting Transmit Filter and Transimpedance Receiver in 90nm CMOS Technology, IEEE INTERNAL SOLIDSTATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, , 0, - (2009)
Equalized Interconnect for Onchip Network Modeling and Optimization Framework, PROCEEDINGS OF IEEEACM INTERNATIONAL CONFERENCE ON COMPUTERAIDED DESIGN, , 0, - (2007)
PowerAdaptive Operational Amplifier with Positive Feedback SelfBiasing, PROCEEDINGS OF IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, , 0, - (2006)
아날로그 레이아웃 자동화를 위한 생성형 파운데이션 모델, , , 0, - (2025)
고속 입출력 회로 테스트 패턴을 위한 병렬화 PRBS 생성기 구현 및 검증, , , 0, - (2025)
POSTECHs Analog Layout Generation Framework, , , 0, - (2025)
Automated Generation of Parallel PRBS Generators in Verilog RTL, , , 0, - (2025)
A Parameterized Cell Design of Resistor Bank, , , 0, - (2025)
LayouttoGenerator Conversion Framework with Graphical User Interface for Analog Layout Generators, , , 0, - (2025)
A Study On Reliable HighSpeed HBC Enhanced by ECC for Wearable Neural Interfaces, Proceeding IEEE International Conference on Artificial Intelligence Circuits and Systems AICAS 2022, , 0, 110-113 (2022)
GUIEnhanced layout generation of FFE SST TXs for fast highspeed serial link design, Proceedings Design Automation Conference, , 0, - (2020)
USB20 용 Allsynthesizable 저 전력 전압모드 송신기 구동회로, 대한전자공학회 2018 정기총회 및 추계학술대회, , 0, - (2018)
안드로이드 스마트폰용 텐서플로우 모바일 라이브러리와 Bidirectional LSTM을 이용한 OnDevice 자동음성인식 어플리케이션, 안드로이드 스마트폰용 텐서플로우 모바일 라이브러리와 Bidirectional LSTM을 이용한 OnDevice 자동음성인식 어플리케이션, , 0, - (2018)
A 03to12V FrequencyScalable FractionalN ADPLLwith a Speculative DualReferenced Interpolating TDC, EEE International SolidState Circuits Conference (ISSCC), , 0, - (2018)
A LowPower Wide DynamicRange Current Readout Circuit for Biosensors, ASPDAC, , 0, - (2018)
A 93 nW AllinOne Bandgap Voltage and Current Reference Circuitusing Leakagebased PTAT Generation and DIBL Characteristic, ASPDAC, , 0, - (2018)
A Theory and Practice To Overcome 50Ω Legacy in HighSpeed Link Applications, Proceedings of ISOCC, , 0, - (2017)
An FFE TX with 38x Eye Improvement by Automatic Impedance Adaptation for Universal Compatibility with Arbitrary Channel and RX Impedances, Symp on VLSI Cir (VLSIC), , 0, - (2017)
A 166pJb 150Mbs Body Channel Communication Transceiver with Decision Feedback Equalization Improving 200 Area Efficiency, Symposium on VLSI Circuits (VLSIC), , 0, - (2017)
A CoefficientErrorRobust FFE TX with 230 Eye Variation Improvement Without Calibration in 65nm CMOS Technology, IEEE CAS SOCIETY KOREAN WORKSHOP ON CIRCUITS AND SYSTEMS, , 0, - (2017)
A 00047mm2 Highly Synthesizable TDC and DCOless FractionalNPLL with a Seamless Lock Range off RER to 1GHz, IEEE International SolidState Circuits Conference (ISSCC), , 0, - (2017)
A Quadrature Relaxation Oscillator with a ProcessInduced FrequencyError Compensation Loop, IEEE International SolidState Circuits Conference (ISSCC), , 0, - (2017)
A 93nW AllinOne Bandgap Voltage and Current Reference Circuit, IEEE International SolidState Circuits Conference (ISSCC), , 0, - (2017)
A TimeBased Receiver with 2tap DFE for a 12Gbspin SingleEndedTransceiver of Mobile DRAM Interface in 08V 65nm CMOS, IEEE International SolidState Circuits Conference (ISSCC), , 0, 400-402 (2017)
Read Margin Analysis in an ReRAM Crossbar Array, , , 0, - (2016)
Hierarchical Design Automation for Electronics, EDA SUMMER WORKSHOP, , 0, - (2015)
An EnergyEfficient Equalized Transceiver for RCdominant Channels, POSTECHNTU SILICON INTERPOSER WORKSHOP, , 0, - (2015)
DFEIIR Equalization, POSTECHNTU SILICON INTERPOSER WORKSHOP, , 0, - (2015)
A CoefficientErrorRobust FFE TX with 230 EyeVariation Improvement Without Calibration in 65nm CMOS Technology, CMOS EMERGING TECHNOLOGY RESEARCH, , 0, - (2014)
수신 단 TIA 터미네이션 기법의 단일 신호선 듀오바이너리 송수신 단 회로, , , 0, - (2014)
LCD VCOM Noise 주파수 (n05) 배의 주파수를 인가 신호 주파수로 이용하는 다중 정전용량 터치 센서, , , 0, - (2014)
오픈루프 시간차이 증폭기를 이용한 고해상도 TimetoDigital Converter, , , 0, - (2014)
USB 20 highspeed PHY interface를 위한 전송선의 Verilog modeling, , , 0, - (2014)
CMOS 이미지 센서 인터페이스용 Gbs SerDes, , , 0, - (2014)
An Experimental Verification of A Scaled RCdominant Interconnect Line Model of Highspeed Wireline, , , 0, - (2014)
A SingleStage 40dBLinear DigitallyControlled Variable Gain Amplifier for Ultrasound Analog Front End, , , 0, - (2014)
A Winner-Take-All Neuromorphic IC in 65nm CMOS, ., 0, 0, - (2014)
Verilog Synthesis of USB 20 Fullspeed Device PHY IP, , , 0, - (2013)
A Power Reduction of 37 in a Differential Serial Link Transceiver by Increasing the Termination Resistance, , , 0, - (2013)
Revisiting HighSpeed Interconnect Channel Modeling, , , 0, - (2013)
Design Automation Techniques for HighSpeed Interconnects, , , 0, - (2013)
High slewrate 12V ClassAB OTA, , , 0, - (2013)
A Neuromorphic IC with Spike-Timing-Dependent-Plasticity, ., 0, 0, - (2013)
A WinnerTakeAll Neuromorphic IC in 65nm CMOS, , , 0, - (2013)
A spread Spectrum Clock Generator Using PhaseFrequency Boosting with a Peak Power Reduction 146dB RMS Jitter 145ps and Power 48mWGHz for USB 30, , , 0, - (2012)
실리콘 인터포저 인터커넥트 연구동향, , , 0, - (2012)
NCO용 Pulse Width Modulator 회로, , , 0, - (2012)
Future StateoftheArt Electrical Interconnect, , , 0, - (2010)
Energy Efficient Wireline Communication Over RCdominant Channels, , , 0, - (2009)
Highlights
연구실적
자체연구개발과제[2015년 신설], 포항공과대학교 (2015-2044)
자체연구개발과제, 포항공과대학교 (2014-2025)
학생인건비통합관리과제, 포항공대산학협력단 (2013-2020)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2016-2017)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2015-2016)
저전력 바이오 센서 구동회로 개발, 한국과학기술연구원 (2015-2016)
코딩기법을 이용한 저항성 CROSS-POINT ARRAY 메모리의 성능 개선 연구, 에스케이하이닉스 주식회사 (2015-2016)
포스텍-난양공대 실리콘 인터포저 인터커넥트 협력 연구 및 교류 프로그램, 재단법인한국연구재단 (2015-2016)
4.11544 이월과제, 재단법인한국연구재단 (2015-2016)
NANO소자의 불확실성에 영향을 적게 받는 인터커넥트 연구(대학부담), 포항공대산학협력단 (2014-2015)
신규부임교수 기자재지원비(대학부담), 포항공대산학협력단 (2014-2015)
신규부임교수 기자재지원비(학과부담), 포항공과대학교 (2014-2015)
인건비풀링과제, 포항공대산학협력단 (2014-2015)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전, 재단법인한국연구재단 (2014-2015)
4.9711/9752_2차년도 이월과제, 재단법인한국연구재단 (2014-2015)
포스텍-난양공대 실리콘 인터포저 인터커넥트 협력 연구 및 교류 프로그램, 재단법인한국연구재단 (2014-2015)
POSTECH-삼성전자 RERAM 클러스터 연구과제(3차년도), 삼성전자(주) (2014-2015)
저전력 바이오센서 구동회로 개발, 한국과학기술연구원 (2015-2015)
NANO소자의 불확실성에 영향을 적게 받는 인터커넥트 연구, 포항공과대학교 (2013-2014)
신규부임교수 기자재지원비(학과부담), 포항공과대학교 (2013-2014)
4.8350_1차년도 이월과제, 재단법인한국연구재단 (2013-2014)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2013-2014)
콘택트렌즈형 지속/자가구동 헬스 모니터링 플랫폼 기술 개발, 한국과학기술연구원 (2014-2014)
POSTECH-삼성전자 RERAM 클러스터 연구과제(2차년도), 삼성전자(주) (2013-2014)
생체-화학-전기 검출기 개발을 위한 다 학제간 교류 및 공동 연구 기획, 포항공과대학교 (2012-2013)
NANO소자의 불확실성에 영향을 적게 받는 인터커넥트 연구, 포항공과대학교 (2012-2013)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2012-2013)
POSTECH-삼성전자 RERAM 클러스터 연구과제(김병섭), 삼성전자(주) (2012-2013)
비침습형 유연바이오 센서구동 방법 개발/ 검증 및 시스템 초소형화 기술개발, 한국과학기술연구원 (2013-2013)
학부생연구프로그램-김도윤(전자)-계수에러에 강력한 트랜스미트 피드 포워드 이궐라이제이션 분석, 포항공과대학교 (2012-2012)
연구개발과제[2015년 신설], 포항공과대학교 (2015-2044)
학생인건비통합관리과제, 포항공대산학협력단 (2013-2040)
차세대 반도체 혁신공유대학 사업단 부서운영비, 포항공대산학협력단 (2021-2027)
연구개발과제, 포항공과대학교 (2014-2025)
반도체 지산학연 협력센터 부서연구관리비, 포항공과대학교 (2022-2025)
S_간접비_김병섭, 포항공과대학교 (2023-2025)
S_직접비_김병섭, 포항공과대학교 (2023-2025)
4.0025960_이월과제, 재단법인한국연구재단 (2024-2025)
첨단분야 혁신융합대학사업, 재단법인한국연구재단 (2024-2025)
차세대 NAND 솔루션 연구, 삼성전자(주) (2024-2025)
SENSOR 특성 최적화 LAYOUT 생성 TOOL 개발, 삼성전자(주) (2025-2025)
PIM 고속 데이터 송수신을 위한 지능형 PHY 인터페이스 기술 개발, 정보통신기획평가원 (2025-2025)
디지털 신기술 인재양성 혁신공유대학사업(차세대반도체), 재단법인한국연구재단 (2023-2024)
S_직접비_김병섭, 포항공과대학교 (2023-2024)
S_간접비_김병섭, 포항공과대학교 (2023-2024)
4.0024144_이월과제, 재단법인한국연구재단 (2023-2024)
PIM 고속 데이터 송수신을 위한 지능형 PHY 인터페이스 기술 개발, 정보통신기획평가원 (2024-2024)
4.0025623/4.0026137_이월과제, 정보통신기획평가원 (2024-2024)
LAYOUT 자동화 SW를 이용한 아날로그 IP 중개연구단의 지원, (재)과학기술사업화진흥원 (2024-2024)
8GB/S 급 고속 반도체 입출력 회로 설계 기술 (솔리드 뷰), 재단법인한국연구재단 (2024-2024)
기초연구실지원사업 부서운영비, 포항공대산학협력단 (2018-2023)
4.0022770_이월과제, 재단법인한국연구재단 (2022-2023)
디지털 신기술 인재양성 혁신공유대학사업(차세대반도체), 재단법인한국연구재단 (2022-2023)
PIM 고속 데이터 송수신을 위한 지능형 PHY 인터페이스 기술 개발, 정보통신기획평가원 (2023-2023)
ANALOG LAYOUT SW 고도화 및 RCD 실용화 지원 연구, (재)과학기술사업화진흥원 (2023-2023)
4.0024552_이월과제, 정보통신기획평가원 (2023-2023)
4.23309/24310_이월과제, (재)과학기술사업화진흥원 (2023-2023)
10GBS 급 고속 반도체 입출력 회로 설계 기술, 재단법인한국연구재단 (2023-2023)
4.0022770_이자과제, 재단법인한국연구재단 (2021-2022)
디지털 신기술 인재양성 혁신공유대학사업(차세대반도체), 재단법인한국연구재단 (2021-2022)
ANALOG LAYOUT SW 고도화 및 RCD 실용화 지원 연구, (재)과학기술사업화진흥원 (2022-2022)
4.22835_이월과제, (재)과학기술사업화진흥원 (2022-2022)
PIM 고속 데이터 송수신을 위한 지능형 PHY 인터페이스 기술 개발, 정보통신기획평가원 (2022-2022)
고속 반도체 입출력 수신기 설계기술, 재단법인한국연구재단 (2022-2022)
실리콘 인터포저를 이용한 다목적 단일 패키지 나노-바이오센서 시스템, 재단법인한국연구재단 (2020-2021)
4.17545/18512 이월과제, 재단법인한국연구재단 (2020-2021)
4.17489/18510 이월과제, 재단법인한국연구재단 (2020-2021)
실시간 고해상도 IN-VIVO IMAGING을 위한 초고속 체내데이터 전송기술 연구실, 재단법인한국연구재단 (2020-2021)
4.0019206/4.0020075_이월과제, 정보통신기획평가원 (2021-2021)
지능형 반도체를 지원하기 위한 초고속 I/O회로의 자동생성 기술 개발, 정보통신기획평가원 (2021-2021)
반도체 아날로그 IP 자동생성 기술사업화 기획 중개연구단, (재)과학기술사업화진흥원 (2021-2021)
ANALOG LAYOUT SW 고도화 및 RCD 실용화 지원 연구, (재)과학기술사업화진흥원 (2021-2021)
실리콘 인터포저를 이용한 다목적 단일 패키지 나노-바이오센서 시스템, 재단법인한국연구재단 (2019-2020)
실시간 고해상도 IN-VIVO IMAGING을 위한 초고속 체내데이터 전송기술 연구실, 재단법인한국연구재단 (2019-2020)
4.16452 이월과제, 재단법인한국연구재단 (2019-2020)
4.16652 이월과제, 재단법인한국연구재단 (2019-2020)
지능형 반도체를 지원하기 위한 초고속 I/O회로의 자동생성 기술 개발, 정보통신기획평가원 (2020-2020)
4.18140 이월과제, 정보통신기획평가원 (2020-2020)
실리콘 인터포저를 이용한 다목적 단일 패키지 나노-바이오센서 시스템, 재단법인한국연구재단 (2018-2019)
실시간 고해상도 IN-VIVO IMAGING을 위한 초고속 체내데이터 전송기술 연구실, 재단법인한국연구재단 (2018-2019)
지능형 반도체를 지원하기 위한 초고속 I/O회로의 자동생성 기술 개발, 정보통신기획평가원 (2019-2019)
실리콘 인터포저와 칩 적층 기법을 이용한 3D IC SIP용 차세대 저전력 초고속 인터커넥트 회로 및 융합설계에 관한 포괄적 연구, 재단법인한국연구재단 (2017-2018)
4.13445/13868_이월과제, 재단법인한국연구재단 (2017-2018)
저전력 바이오 센서 구동회로 개발, 한국과학기술연구원 (2017-2018)
4.12343_이월과제, 재단법인한국연구재단 (2016-2017)
저전력 바이오 센서 구동회로 개발, 한국과학기술연구원 (2016-2017)
Intellectual Property
IP
김병섭, 계수 오류에 강한 등화 송신기, 한국, 10-2015-0173193 (2015)
김병섭, 계수 오류 로버스트 피드포워드등화기, USA, 14/889,814 (2015)
김병섭, 계수 오류 로버스트 피드포워드등화기, -, PCT/KR2014/0038 (2014)
김병섭, 계수 오류 로버스트 피드포워드등화기, 한국, 10-2014-0052097 (2014)
김병섭, 계수 오류 로버스트 피드포워드등화기, 한국, 10-2013-0051427 (2013)
김병섭,최준웅, 인공지능 모델 기반 반도체 소자의 레이아웃 데이터 생성 방법 및 그 시스템, 한국, 10-2026-0152586 (IP26)
김병섭,최준웅,정순규, 인공지능 모델 기반 반도체 소자의 레이아웃 데이터 생성 방법 및 그 시스템, 한국, 10-2026-0016858 (IP25)
김병섭,문창재, 송신기 및 그를 포함하는 메모리 시스템, 한국, 10-2025-0085100 (IP25)
김병섭,이지윤,문창재, 피드 포워드 등화기, 한국, 10-2025-0061898 (IP25)
김병섭,정순규, 반도체 설계 프로그램의 사용자 인터페이스 방법 및 연산 장치, USA, 18/651,601 (2023)
김병섭,정순규, 반도체 설계 프로그램의 사용자 인터페이스 방법 및 연산 장치, -, PCT/KR2023/0146 (2023)
김병섭,정순규, 반도체 레이아웃의 제너레이터 할당 방법, 할당 학습 방법 및 연산 장치, USA, 18/652,685 (2023)
김병섭,정순규, 반도체 레이아웃의 제너레이터 할당 방법, 할당 학습 방법 및 연산 장치, -, PCT/KR2023/0147 (2023)
김병섭,서재영, 데이터 내장형 클럭 송수신기 및 이를 포함하는 시스템, 중국, 202310180148.7 (2023)
김병섭,서재영, 데이터 내장형 클럭 송수신기 및 이를 포함하는 시스템, USA, 18/163,559 (2023)
김병섭,문창재, 피드 포워드 등화기 및 이를 포함하는 시스템, 중국, 202310519852.0 (2023)
김병섭,문창재, 피드 포워드 등화기 및 이를 포함하는 시스템, USA, 18/144,331 (2023)
김광민,김병섭, 고속 송신기의 아이 사이즈 및 전력 소모량을 빠르게 자동으로 평가하는 소프트웨어, 한국, C-2022-052322 (PR20)
김병섭,문창재, 피드 포워드 등화기 및 이를 포함하는 시스템, 한국, 10-2022-0108990 (2022)
김병섭,한창윤, 반사 신호 상쇄를 활용한 멀티 드롭 채널 설계 기술, 한국, 10-2022-0117442 (2022)
김병섭,정순규, 반도체 설계 프로그램의 사용자 인터페이스 방법 및 연산 장치, 한국, 10-2023-0058395 (2022)
김병섭,정순규, 반도체 레이아웃의 제너레이터 할당 방법, 할당 학습 방법 및 연산 장치, 한국, 10-2023-0058398 (2022)
김병섭,서재영, 데이터 내장형 클럭 송수신기 및 이를 포함하는 시스템, 한국, 10-2022-0105543 (2022)
김병섭,문창재, 인버터 드라이버를 이용한 탭간의 덧셈만 사용하는 피드포워드 등화기, 한국, 10-2022-0057392 (2022)
김병섭,서재영, 근거리 메모리 인터페이스를 위한 듀티 사이클 교정 회로와 클락 및 데이터 복구 회로가 없는 데이터 내장형 신호 송수신기, 한국, 10-2022-0021574 (2022)
한승호,김병섭,정순규, pLay를 사용한 FFE SST 송신기 레이아웃 생성기 (A generator of a FFE SST TX using pLay), 한국, C-2021-024694 (PR20)
한승호,김병섭,정순규, pLay: 파라미터 변수화된 레이아웃 자동 생성기 (pLay: parameterized layout generator), 한국, C-2021-024693 (PR20)
김병섭,이수은, 신호 반사가 심한 인터커넥트를 위한 고효율 위상 차 변조 송수신기와 클락 복구 회로, USA, 16/413,212 (2020)
김병섭,이수은, 고반사 인터커넥트를 위한 위상차 변조 송수신기 및 클럭 복구회로, USA, 16/413,212 (2020)
김병섭,이수은, 신호 반사가 심한 인터커넥트를 위한 고효율 위상 차 변조 송수신기와 클락 복구 회로, 한국, 10-2019-0016843 (2019)
김병섭,최민수, 완화된 임피던스 매칭을 제공하는 송신 장치 및 수신 장치, USA, 16/235,053 (2018)
김병섭,최민수, 완화된 임피던스 매칭을 제공하는 송신 장치 및 수신 장치, 한국, 10-2018-0062901 (2018)
김병섭,이수은, 고반사 인터커넥트를 위한 위상차 변조 송수신기 및 클럭 복구회로, 한국, 10-2018-0057992 (2018)
김병섭, 계수 오류 로버스트 피드포워드등화기, -, PCT/KR2014/0038 (P201)
김병섭,정순규, 반도체 레이아웃의 제너레이터 할당 방법, 할당 학습 방법 및 연산 장치, 중국, 202380097852.4 (P202)
김병섭,정순규, 반도체 레이아웃의 제너레이터 할당 방법, 할당 학습 방법 및 연산 장치, EP, 23935817.9 (P202)
김병섭,정순규, 반도체 설계 프로그램의 사용자 인터페이스 방법 및 연산 장치, 중국, 202380097836.5 (P202)
김병섭,정순규, 반도체 설계 프로그램의 사용자 인터페이스 방법 및 연산 장치, EP, 23935816.1 (P202)