A 087pJb 17Gbspin Parallel Receiver with a Local DQS Recovery for a SupplyNoiseTolerant DQS Distribution in HighPerformance NAND Flash Interfaces, Digest of Technical Papers IEEE International SolidState Circuits Conference, , 0, 638-640 (2026)
A 128Gbs Parallel Receiver with a OneWay SelfTraining Scheme for Equalizing ISI and Reflections in MultiDrop Memory Interfaces, Digest of Technical Papers IEEE International SolidState Circuits Conference, , 0, 636-638 (2026)
PCOpt Partition and Conquestbased Optimizer using MultiAgents for Complex Analog Circuits, Proceedings of the Asia and South Pacific Design Automation Conference ASPDAC, , 0, 842-848 (2025)
OCL Ordinal Contrastive Learning for Imputating Features with Progressive Labels, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), , 0, 334-344 (2024)
A 94fsrmsJitter and 2493dB FoM 40GHz RingOscillatorBased MDLL with Background Calibration of Phase Offset and Injection Slope Mismatch, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2024)
A 246fJb 133Tbsmm SingleEnded CurrentMode Transceiver with Crosstalk Cancellation for ShieldLess ShortReach Interconnect, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2024)
A 710b Programmable CryoCMOS TISAR ADC for Multichannel Qubit Readout with OnChip Background InterChannel Mismatch Calibrations, IEEE 49TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE ESSCIRC 2023, , 0, 169-172 (2023)
Joint Optimization of Cache Management and Graph Reordering for GCN Acceleration, 2023 IEEEACM International Symposium on Low Power Electronics and Design (ISLPED), , 0, - (2023)
A 110dBTCMRR TDMbased 8Channel Noncontact ECG Recording IC with Suppression of MotionInduced Coupling in 03s and CMI Cancellation up to 22VPP, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2023)
A 28 nm 668 TOPSW SparsityAware DynamicPrecision DeepLearning Processor, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2023)
A 65nW 735dBm Sensitivity Cryptographic WakeUp Receiver with a PUFbased OTP and TemperatureInsensitive Code Recovery, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2023)
A Cryogenic Controller IC for Superconducting Qubits with DRAG Pulse Generation by Direct Synthesis without Using Memory, , , 0, - (2023)
A 1278TOPSW Arbitrarily Quantized 1to8b ScalablePrecision Accelerator for GeneralPurpose Deep Learning with Reduction of Storage Logic and Latency Waste, 2023 IEEE International Solid State Circuits Conference (ISSCC), , 0, - (2023)
MCQA Multiconstraint qubit allocation for nearFTQC device, IEEEACM International Conference on ComputerAided Design Digest of Technical Papers ICCAD, , 0, - (2022)
Configurable EnergyEfficient LatticeBased PostQuantum Cryptography Processor for IoT Devices, ESSCIRC 2022 IEEE 48th European Solid State Circuits Conference Proceedings, , 0, 525-528 (2022)
A fast and scalable qubitmapping method for noisy intermediatescale quantum computers, Proceedings Design Automation Conference, , 0, 13-18 (2022)
A SecondOrder TemperatureCompensated OnChip RRC Oscillator Achieving 793ppm°C and 33pJHz in 40°C to 125°C Temperature Range, 2022 IEEE International Solid State Circuits Conference (ISSCC), , 0, - (2022)
A TimeDivision Multiplexed 8Channel NonContact ECG Recording IC with a CommonMode Interference Tolerance of 20mathrmVtextPP, 2022 IEEE International Solid State Circuits Conference (ISSCC), , 0, - (2022)
A CryoCMOS Controller IC With Fully Integrated Frequency Generators for Superconducting Qubits, Digest of Technical Papers IEEE International SolidState Circuits Conference, , 0, 362-364 (2022)
A 55mWChannel 2to7 GHz Frequency Synthesizable QubitControlling Cryogenic Pulse Modulator for Scalable Quantum Computers, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2021)
유전층과 전극층 사이의 표면적을 증가를 통해 강성과 효율을 높인 접촉대전 나노발전기 , 2019 한국군사과학기술학회 종합학술대회, , 0, - (2019)
하이브리드 에너지 수확이 가능한 접촉대전 나노발전기 개발 , 2019 한국군사과학기술학회 종합학술대회, , 0, - (2019)
A 143nW GlucoseMonitoring Smart Contact Lens IC with a DualMode Transmitter for WirelessPowered Backscattering and RFRadiated Transmission Using a Single Loop Antenna, IEEE Symposium on VLSI Circuits Digest of Technical Papers, , 0, C294-C295 (2019)
A 143nW GlucoseMonitoring Smart Contact Lens IC with a DualMode Transmitter for WirelessPowered Backscattering and RFRadiated Transmission Using a Single Loop Antenna, A 143nW GlucoseMonitoring Smart Contact Lens IC with a DualMode Transmitter for WirelessPowered Backscattering and RFRadiated Transmission Using a Single Loop Antenna, , 0, - (2019)
A 192pW Hybrid BandgapVth Reference with Process Dependence Compensated by a DimensionInduced SideEffect, A 192pW Hybrid BandgapVth Reference with Process Dependence Compensated by a DimensionInduced SideEffect, , 0, - (2019)
USB20 용 Allsynthesizable 저 전력 전압모드 송신기 구동회로, 대한전자공학회, , 0, - (2018)
안드로이드 스마트폰용 텐서플로우 모바일 라이브러리와 Bidirectional LSTM을 이용한 OnDevice 자동음성인식 어플리케이션, 대한전자공학회, , 0, - (2018)
A 03to12V frequencyscalable fractionalN ADPLL with a speculative dualreferenced interpolating TDC, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2018)
A 78Gbspin 196pJb Compact SingleEnded TRX and CDR with PhaseDifference Modulation for Highly Reflective Memory Interfaces, IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2018)
A 166pJb 150Mbs Body Channel Communication Transceiver with Decision Feedback Equalization Improving 200x Area Efficiency, Proceedings of ACM Asia and Pacific Design Automation Conference (ASPDAC), , 0, - (2018)
A 10GHz Multipurpose Reconfigurable Builtin SelfTest Circuit for HighSpeed Links, IEEE Asian SolidState Circuits Conference, , 0, - (2017)
오디오용 쵸퍼 안정화 방식을 이용한 저잡음 증폭기, 추계학술대회, , 0, - (2016)
AllSynthesizable 6Gbps VoltageMode Transmitter for Serial Link, ASSCC, , 0, - (2016)
An ECG monitoring system using Android smart phone, 2016 IEEE INTERNATIONAL CONFERENCEON CONSUMER ELECTRONICSASIA (ICCEASIA), , 0, - (2016)
Allsynthesizable transmitter driver and data recovery circuit for USB20 interface, ISOCC 2016, , 0, - (2016)
A lowpower LDO circuit with a fast load regulation, APCCAS 2016, , 0, - (2016)
Fullspeed USB PHYLINK 소자와 델타모듈레이터 ADC를 이용한 안드로이드 스마트폰용 오실로스코프, 2016 하계종합학술대회, , 0, - (2016)
시리얼 링크를 위한 디지털 합성화된 다중 위상고정루프, 2016 하계종합학술대회, , 0, - (2016)
A LowEMI FourBit FourWire SingleEnded DRAM Interface by Using a ThreeLevel Balanced Coding Scheme, 2016 IEEE SYMPOSIUM ON, , 0, - (2016)
Allsynthesizable 5phase PhaseLocked Loop, ICEIC 2016, , 0, - (2016)
Allsynthesizable currentmode transmitter driver for serial link interface, ICEIC 2016, , 0, - (2016)
All-synthesizable 5-phase Phase-Locked Loop, ICEIC 2016, 0, 0, – (2016)
All-synthesizable current-mode transmitter driver for serial link interface, ICEIC 2016, 0, 0, – (2016)
A ReducedSize LookUpTable for ADC SampleTimes of a SingleChip NonUniformSampling DigitalBeamformer for Ultasound Medical Imaging, ISOCC, , 0, - (2015)
An Approximate Condition to Avoid Reverse Leakage Current in ReRAM Crossbar Design, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, , 0, - (2015)
Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design, IEEEACM INTERNATIONAL COMPUTERAIDED DESIGN CONFERENCE, , 0, - (2015)
A MutualCapacitive Touch Sensor ROIC Using a PLL to Reduce LCD Noise by Synchronizing ROIC TX Clock to LCD Clock, IEEE SENSORS CONFERENCE, , 0, - (2015)
An ultra-low-power biomedical chip for injectable pressure monitor, IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE, 0, 0, - (2015)
A 35dBLinear Variable Gain Amplifier Circuit of DigitalBeamformer for Ultrasound Medical Imaging, ITCCSCC, , 0, - (2015)
Highspeed USB 20 device 용 Link 및 Data Acquisition System, 대한전자공학회 하계학술대회, , 0, - (2015)
EnergyEfficient CDCs for Millimeter Sensor Nodes, ADVANCES IN ANALOG CIRCUIT DESIGN (AACD), , 0, - (2015)
A 29nW bandgap reference circuit, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, , 0, - (2015)
EMI issues in pseudodifferential signaling for SDRAM interface, 제 22회 한국반도체 학술대회, , 0, - (2015)
A Reduced-Size Look-Up-Table for ADC Sample-Times of a Single-Chip Non-Uniform-Sampling Digital-Beamformer for Ultasound Medical Imaging, ISOCC, 0, 0, – (2015)
Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design, IEEE/ACM INTERNATIONAL COMPUTER-AIDED DESIGN CONFERENCE, 0, 0, – (2015)
An Approximate Condition to Avoid Reverse Leakage Current in ReRAM Crossbar Design, IEEE INTERNATIONAL SOC DESIGN CONFERENCE, 0, 0, – (2015)
A Mutual-Capacitive Touch Sensor ROIC Using a PLL to Reduce LCD Noise by Synchronizing ROIC TX Clock to LCD Clock, IEEE SENSORS CONFERENCE, 0, 0, – (2015)
A 35dB-Linear Variable Gain Amplifier Circuit of Digital-Beamformer for Ultrasound Medical Imaging, ITC-CSCC, 0, 0, – (2015)
High-speed USB 2.0 device 용 Link 및 Data Acquisition System, 대한전자공학회 하계학술대회, 0, 0, – (2015)
Energy-Efficient CDCs for Millimeter Sensor Nodes, ADVANCES IN ANALOG CIRCUIT DESIGN (AACD), 0, 0, – (2015)
A 29-nW bandgap reference circuit, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, 0, 0, – (2015)
EMI issues in pseudo-differential signaling for SDRAM interface, 제 22회 한국반도체 학술대회, 0, 0, – (2015)
VoltageScalable 10b Pipelined ADC with CurrentMode Amplifier, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, , 0, - (2014)
A 04 V Driving MultiTouch Capacitive Sensor with the Driving Signal Frequency set to (n05) Times the Inverse of the LCD VCOM Noise Period, DIGEST OF TECHNICAL PAPERS IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, 682-685 (2014)
LCD VCOM Noise 주파수 (n05) 배의 주파수를 인가 신호 주파수로 이용하는 다중 정전용량 터치 센서, 대한전자공학회 SOC 학술대회, , 0, - (2014)
오픈루프 시간차이 증폭기를 이용한 고해상도 TimetoDigital Converter, 대한전자공학회 SOC 학술대회, , 0, - (2014)
USB 20 highspeed PHY interface를 위한 전송선의 Verilog modeling, 대한전자공학회 SOC 학술대회, , 0, - (2014)
수신 단 TIA 터미네이션 기법의 단일 신호선 듀오바이너리 송수신 단 회로, 대한전자공학회 SOC 학술대회, , 0, - (2014)
CMOS 이미지 센서 인터페이스용 Gbs SerDes, 대한전자공학회 SOC 학술대회, , 0, - (2014)
SingleStage 40dBLinear DigitallyControlled Variable Gain Amplifier for Ultrasound Analog Front End, 한국반도체학술대회, , 0, - (2014)
An AnalogDigitalHybrid SingleChip RX Beamformer with NonUniform Sampling for 2DCMUT Ultrasound Imaging to Achieve Wide Dynamic Range of Delay and Small Chip Area, DIGEST OF TECHNICAL PAPERS IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, 426-427 (2014)
A 160nW 639fJconversionstep CapacitancetoDigital Converter for UltraLowPower Wireless Sensor Nodes, DIGEST OF TECHNICAL PAPERS IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, 220-221 (2014)
A CoefficientErrorRobust FFE TX with 230 EyeVariation Improvement Without Calibration in 65nm CMOS Technology, DIGEST OF TECHNICAL PAPERS IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, 50-51 (2014)
A 567mW 9Gbs DLLBased Referenceless CDR with PatternDependent ClockEmbedded Signaling for IntraPanel Interface, DIGEST OF TECHNICAL PAPERS IEEE INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, 48-49 (2014)
Voltage-Scalable 10-b Pipelined ADC with Current-Mode Amplifier, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, 0, 0, – (2014)
A 0.4 V Driving Multi-Touch Capacitive Sensor with the Driving Signal Frequency set to (n+0.5) Times the Inverse of the LCD VCOM Noise Period, DIGEST OF TECHNICAL PAPERS – IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, 682-685 (2014)
오픈루프 시간차이 증폭기를 이용한 고해상도 Time-to-Digital Converter, 대한전자공학회 SOC 학술대회, 0, 0, – (2014)
USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling, 대한전자공학회 SOC 학술대회, 0, 0, – (2014)
수신 단 TIA 터미네이션 기법의 단일 신호선 듀오바이너리 송수신 단 회로, 대한전자공학회 SOC 학술대회, 0, 0, – (2014)
LCD VCOM Noise 주파수 (n+0.5) 배의 주파수를 인가 신호 주파수로 이용하는 다중 정전용량 터치 센서, 대한전자공학회 SOC 학술대회, 0, 0, – (2014)
CMOS 이미지 센서 인터페이스용 Gb/s SerDes, 대한전자공학회 SOC 학술대회, 0, 0, – (2014)
Single-Stage 40dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Analog Front End, 한국반도체학술대회, 0, 0, – (2014)
An Analog-Digital-Hybrid Single-Chip RX Beamformer with Non-Uniform Sampling for 2D-CMUT Ultrasound Imaging to Achieve Wide Dynamic Range of Delay and Small Chip Area, DIGEST OF TECHNICAL PAPERS – IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, 426-427 (2014)
A 160nW 63.9fJ/conversion-step Capacitance-to-Digital Converter for Ultra-Low-Power Wireless Sensor Nodes, DIGEST OF TECHNICAL PAPERS – IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, 220-221 (2014)
A Coefficient-Error-Robust FFE TX with 230% Eye-Variation Improvement Without Calibration in 65nm CMOS Technology, DIGEST OF TECHNICAL PAPERS – IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, 50-51 (2014)
A 5.67mW 9Gb/s DLL-Based Reference-less CDR with Pattern-Dependent Clock-Embedded Signaling for Intra-Panel Interface, DIGEST OF TECHNICAL PAPERS – IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, 48-49 (2014)
Fullspeed USB 20 device 용 Link 및 Application layer 칩, 대한전자공학회 추계학술대회 논문집, , 0, 43-46 (2013)
Verilog Synthesis of USB 20 Fullspeed Device PHY IP, ISOCC, , 0, - (2013)
A Power reduction of 37 in a Differential Serial Link Transceiver by Increasing the Termination Resistance, PROCEEDINGS OF THE 2013 IEEE ASIAN SOLIDSTATE CIRCUITS CONFERENCE, , 0, 221-224 (2013)
65nW CMOS Temperature Sensor for UltraLow Power Microsystems, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, , 0, - (2013)
45pW ESD Clamp Circuit for UltraLow Power Applications, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, , 0, - (2013)
Alldigital USB 20 device Fullspeed PHY 칩, 대한전자공학회 하계학술대회, , 0, - (2013)
High slewrate 12V ClassAB OTA, ITCCSCC, , 0, 222-224 (2013)
A MeasurementBased Time and Frequency Domain Analysis of the LCD VCOM Noise, SID SYMPOSIUM DIGEST OF TECHNICAL PAPERS, , 0, 1501-1504 (2013)
RCdominant 채널의 간단한 전달 함수모델을 이용한 RCdominant 인터커넥트 채널의 길이와 손실의 Tradeoff 분석, 대한전자공학회 SOC 학술대회, , 0, - (2013)
A 27 Reduction in Transceiver Power for SingleEnded PointtoPoint DRAM Interface with the Termination Resistance of 4xZ0 at both TX and RX, ISSCC, , 0, 308-310 (2013)
A 95fJb CurrentMode Transceiver for 10mm OnChip Interconnect, ISSCC, , 0, 262-264 (2013)
A 045V 423nW 32MHz Multiplying DLL with LeakageBased Oscillator for UltraLowPower Sensor Platforms, ISSCC, , 0, 188-190 (2013)
A WinnerTakeAll Neuromorphic IC in 65nm CMOS, 한국반도체학술대회, , 0, - (2013)
A Neuromorphic IC with SpikeTimingDependentPlasticity, 한국반도체학술대회, , 0, - (2013)
A 416kSs 12bit algorithmic ADC compensating capacitance mismatch of MDAC in digital domain, ICEIC, , 0, - (2013)
Full-speed USB 2.0 device 용 Link 및 Application layer 칩, 대한전자공학회 추계학술대회 논문집, 0, 0, 43-46 (2013)
Verilog Synthesis of USB 2.0 Full-speed Device PHY IP, ISOCC, 0, 0, – (2013)
A Power reduction of 37% in a Differential Serial Link Transceiver by Increasing the Termination Resistance, PROCEEDINGS OF THE 2013 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, 0, 0, 221-224 (2013)
45pW ESD Clamp Circuit for Ultra-Low Power Applications, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, 0, 0, – (2013)
65nW CMOS Temperature Sensor for Ultra-Low Power Microsystems, PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE, 0, 0, – (2013)
All-digital USB 2.0 device Full-speed PHY 칩, 대한전자공학회 하계학술대회, 0, 0, – (2013)
High slew-rate 1.2V Class-AB OTA, ITC-CSCC, 0, 0, 222-224 (2013)
A Measurement-Based Time and Frequency Domain Analysis of the LCD VCOM Noise, SID SYMPOSIUM DIGEST OF TECHNICAL PAPERS, 0, 0, 1501-1504 (2013)
RC-dominant 채널의 간단한 전달 함수모델을 이용한 RC-dominant 인터커넥트 채널의 길이와 손실의 Trade-off 분석, 대한전자공학회 SOC 학술대회, 0, 0, – (2013)
A 27% Reduction in Transceiver Power for Single-Ended Point-to-Point DRAM Interface with the Termination Resistance of 4xZ0 at both TX and RX, ISSCC, 0, 0, 308-310 (2013)
A 95fJ/b Current-Mode Transceiver for 10mm On-Chip Interconnect, ISSCC, 0, 0, 262-264 (2013)
A 0.45V 423nW 3.2MHz Multiplying DLL with Leakage-Based Oscillator for Ultra-Low-Power Sensor Platforms, ISSCC, 0, 0, 188-190 (2013)
A Winner-Take-All Neuromorphic IC in 65nm CMOS, 한국반도체학술대회, 0, 0, – (2013)
A Neuromorphic IC with Spike-Timing-Dependent-Plasticity, 한국반도체학술대회, 0, 0, – (2013)
A 416-kS/s 12-bit algorithmic ADC compensating capacitance mismatch of MDAC in digital domain, ICEIC, 0, 0, – (2013)
델타시그마 기법을 이용한 USB30 어플리케이션용 스프레드 스펙트럼 클락 생성기, 대한전자공학회 추계학술대회, , 0, - (2012)
저항형 센서를 위한 연관된 중복 샘플 방식의 인터페이스 회로, 한국센서학회 종합학술대회, , 0, 78-78 (2012)
A SingleChip TimeInterleaved 32Channel Analog Beamformer for Ultrasound Medical Imaging, ASSCC, , 0, - (2012)
A Spread Spectrum Clock Generator Using PhaseFrequency Boosting with a Peak Power Reduction 146dB RMS Jitter 145ps and Power 48mWGHz for USB 30, ASSCC, , 0, - (2012)
An Onchip TSV Emulation Using Metal Bar Surrounded by Metal Ring to Develop Interface Circuits, ISOCC, , 0, 192-195 (2012)
A FractionalN Frequency Divider for SSCG Using a Single DualModulus Integer Divider and a Phase Interpolator, ISOCC, , 0, 68-71 (2012)
A 05V 113μW 1kSs Resistive Sensor Interface Circuit with Correlated Double Sampling, CICC, , 0, - (2012)
A 10Touch CapacitiveTouch Sensor Circuit with the TimeDomain InputNode Isolation, SID SYMPOSIUM DIGEST OF TECHNICAL PAPERS, , 0, 493-496 (2012)
NCO 용 Pulse Width Modulator 회로, 대한전자공학회 SOC 학술대회, , 0, - (2012)
An 8GBs QuadSkewCancelling Parallel Transceiver in 90nm CMOS for HighSpeed DRAM Interface, ISSCC, , 0, 136-137 (2012)
A 5Gbs SingleEnded Parallel Receiver with Adaptive FEXT Cancellation, ISSCC, , 0, 140-141 (2012)
델타-시그마 기법을 이용한 USB3.0 어플리케이션용 스프레드 스펙트럼 클락 생성기, 대한전자공학회 추계학술대회, 0, 0, – (2012)
저항형 센서를 위한 연관된 중복 샘플 방식의 인터페이스 회로, 한국센서학회 종합학술대회, 0, 0, 78-78 (2012)
A Spread Spectrum Clock Generator Using Phase/Frequency Boosting with a Peak Power Reduction 14.6dB, RMS Jitter 1.45ps and Power 4.8mW/GHz for USB 3.0, ASSCC, 0, 0, – (2012)
A Single-Chip Time-Interleaved 32-Channel Analog Beamformer for Ultrasound Medical Imaging, ASSCC, 0, 0, – (2012)
An On-chip TSV Emulation Using Metal Bar Surrounded by Metal Ring to Develop Interface Circuits, ISOCC, 0, 0, 192-195 (2012)
A Fractional-N Frequency Divider for SSCG Using a Single Dual-Modulus Integer Divider and a Phase Interpolator, ISOCC, 0, 0, 68-71 (2012)
A 0.5V, 11.3-μW, 1-kS/s Resistive Sensor Interface Circuit with Correlated Double Sampling, CICC, 0, 0, – (2012)
A 10-Touch Capacitive-Touch Sensor Circuit with the Time-Domain Input-Node Isolation, SID SYMPOSIUM DIGEST OF TECHNICAL PAPERS, 0, 0, 493-496 (2012)
NCO 용 Pulse Width Modulator 회로, 대한전자공학회 SOC 학술대회, 0, 0, – (2012)
A 5Gb/s Single-Ended Parallel Receiver with Adaptive FEXT Cancellation, ISSCC, 0, 0, 140-141 (2012)
An 8GB/s Quad-Skew-Cancelling Parallel Transceiver in 90nm CMOS for High-Speed DRAM Interface, ISSCC, 0, 0, 136-137 (2012)
공정산포 자체 보정 기능을 갖는 WinnerTakeAll Neuromorphic 시스템 회로 설계, 대한전자공학회 추계학술대회, , 0, - (2011)
TimeInterleaved Sample Clock Generator for Ultrasound Beamformer Application, ISOCC, , 0, 290-293 (2011)
A HighGain WideInputRange Time Amplifier with an OpenLoop Architecture and a Gain Equal to Current Bias Ratio, ASSCC, , 0, 325-328 (2011)
DigitalDomain Calibration of SplitCapacitor DAC with no Extra Calibration DAC for a DifferentialType SAR ADC, ASSCC, , 0, 77-80 (2011)
센서 인터페이스 응용을 위한 05 V 100 kSs 13b SAR AD 변환기, 한국센서학회 종합학술대회 논문집, , 0, 134-134 (2011)
PhaseBlenderBased FIR Noise Filtering Techniques for ΔΣ FractionalN PLL, MWSCAS, , 0, - (2011)
USB 20 Protocol Layer의 FPGA 구현과 검증, 대한전자공학회 하계종합학술대회, , 0, 376-379 (2011)
PCB상에 구현한 Mutual Capacitive 방식의 MultiTouch pad, 대한전자공학회 하계종합학술대회, , 0, 338-341 (2011)
Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits, ITCCSCC, , 0, - (2011)
Reduction in the Peak Frequency Spectrum of ClockEmbedded DataSignal for TFTLCD Compared With the RegularClock and PRBSData Signals, ITCCSCC, , 0, - (2011)
A 2 GHz FractionalN Digital PLL with lb Noise Shaping ΔΣ TDC, SYMPOSIUM ON VLSI CIRCUITS DIGETS OF TECHNICAL PAPERS, , 0, 116-117 (2011)
A 063ps Resolution 11b Pipeline TDC in 013μm CMOS, SYMPOSIUM ON VLSI CIRCUITS DIGEST OF TECHNICAL PAPERS, , 0, 152-153 (2011)
센서 인터페이스용 14비트 Cyclic ADC의 설계, 대한전자공학회 SOC 학술대회, , 0, 58-61 (2011)
A 01fref BW 1GHz FractionalN PLL with FIREmbedded PhaseInterpolatorBased Noise Filtering, ISSCC, , 0, 94-95 (2011)
A 07V 233nW Analog CMOS FrontEnd Circuit for Portable HeartRate Monitor, 한국반도체학술대회, , 0, 127-128 (2011)
공정산포 자체 보정 기능을 갖는 Winner-Take-All Neuromorphic 시스템 회로 설계, 대한전자공학회 추계학술대회, 0, 0, – (2011)
Time-Interleaved Sample Clock Generator for Ultrasound Beamformer Application, ISOCC, 0, 0, 290-293 (2011)
A High-Gain Wide-Input-Range Time Amplifier with an Open-Loop Architecture and a Gain Equal to Current Bias Ratio, ASSCC, 0, 0, 325-328 (2011)
Digital-Domain Calibration of Split-Capacitor DAC with no Extra Calibration DAC for a Differential-Type SAR ADC, ASSCC, 0, 0, 77-80 (2011)
센서 인터페이스 응용을 위한 0.5 V 100 kS/s 13b SAR A/D 변환기, 한국센서학회 종합학술대회 논문집, 0, 0, 134-134 (2011)
Phase-Blender-Based FIR Noise Filtering Techniques for ΔΣ Fractional-N PLL, MWSCAS, 0, 0, – (2011)
USB 2.0 Protocol Layer의 FPGA 구현과 검증, 대한전자공학회 하계종합학술대회, 0, 0, 376-379 (2011)
PCB상에 구현한 Mutual Capacitive 방식의 Multi-Touch pad, 대한전자공학회 하계종합학술대회, 0, 0, 338-341 (2011)
Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits, ITC-CSCC, 0, 0, – (2011)
Reduction in the Peak Frequency Spectrum of Clock-Embedded Data-Signal for TFT-LCD Compared With the Regular-Clock and PRBS-Data Signals, ITC-CSCC, 0, 0, – (2011)
A 0.63ps Resolution, 11b Pipeline TDC in 0.13μm CMOS, SYMPOSIUM ON VLSI CIRCUITS DIGEST OF TECHNICAL PAPERS, 0, 0, 152-153 (2011)
A 2 GHz Fractional-N Digital PLL with lb Noise Shaping ΔΣ TDC, SYMPOSIUM ON VLSI CIRCUITS DIGETS OF TECHNICAL PAPERS, 0, 0, 116-117 (2011)
센서 인터페이스용 14비트 Cyclic ADC의 설계, 대한전자공학회 SOC 학술대회, 0, 0, 58-61 (2011)
A 0.1-fref BW 1GHz Fractional-N PLL with FIR-Embedded Phase-Interpolator-Based Noise Filtering, ISSCC, 0, 0, 94-95 (2011)
A 0.7-V 233-nW Analog CMOS Front-End Circuit for Portable Heart-Rate Monitor, 한국반도체학술대회, 0, 0, 127-128 (2011)
Wide Gain Range와 dBLinear 특성을 가진 저전력 CMOS 가변 이득 증폭기, 대한전자공학회 추계종합학술대회, , 0, 14-15 (2010)
A Transmitter with Different Output Timing to Compensate for the CrosstalkInduced Jitter of Coupled Microstrip Lines, ISOCC, , 0, 364-367 (2010)
Verilog를 이용한 USB Serial Interface Engine 설계, 대한전자공학회 연합학술대회, , 0, - (2010)
A CrosstalkandISI Equalizing Receiver in 2Drop SingleEnded SSTL Memory Channel, CICC, , 0, - (2010)
A SlewRate Controlled Transmitter to Compensate for the CrosstalkInduced Jitter of Coupled Microstrip Lines, CICC, , 0, - (2010)
Digital Circuit of USB 20 PHY High Speed RX Interface, ICEIC, , 0, - (2010)
TX Digital Circuit for USB 20 PHY High Speed Interface, ICEIC, , 0, - (2010)
HighSpeed Links for Memory Interface, ICICDT, , 0, 16-19 (2010)
High-Speed Links for Memory Interface, ICICDT, 0, 0, 16-19 (2010)
A LowEMI 2Gbps ClockAlignedtoData IntraPanel Interface (CADI) for TFTLCD with the VSYNCEmbedded Clock and Equalization, SID SYMPOSIUM DIGEST OF TECHNICAL PAPERS, , 0, 62-65 (2010)
Twocoupled 마이크로스트립 라인의 SPICE RLGC 파라미터 추출, 대한전자공학회 SOC 학술대회, , 0, - (2010)
A 1GHz ADPLL with a 1.25ps Minimum-Resolution Sub-Exponent TDC in 0.18um CMOS, INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, 0, 0, - (2010)
A 1GHz ADPLL with a 125ps MinimumResolution SubExponent TDC in 018um CMOS, INTERNATIONAL SOLIDSTATE CIRCUITS CONFERENCE, , 0, - (2010)
Wide Gain Range와 dB-Linear 특성을 가진 저전력 CMOS 가변 이득 증폭기, 대한전자공학회 추계종합학술대회, 0, 0, 14-15 (2010)
A Transmitter with Different Output Timing to Compensate for the Crosstalk-Induced Jitter of Coupled Microstrip Lines, ISOCC, 0, 0, 364-367 (2010)
Verilog를 이용한 USB Serial Interface Engine 설계, 대한전자공학회 연합학술대회, 0, 0, – (2010)
A Crosstalk-and-ISI Equalizing Receiver in 2-Drop Single-Ended SSTL Memory Channel, CICC, 0, 0, – (2010)
A Slew-Rate Controlled Transmitter to Compensate for the Crosstalk-Induced Jitter of Coupled Microstrip Lines, CICC, 0, 0, – (2010)
TX Digital Circuit for USB 2.0 PHY High Speed Interface, ICEIC, 0, 0, – (2010)
Digital Circuit of USB 2.0 PHY High Speed RX Interface, ICEIC, 0, 0, – (2010)
A Low-EMI 2Gbps Clock-Aligned-to-Data Intra-Panel Interface (CADI) for TFT-LCD with the VSYNC-Embedded Clock and Equalization, SID SYMPOSIUM DIGEST OF TECHNICAL PAPERS, 0, 0, 62-65 (2010)
Two-coupled 마이크로스트립 라인의 SPICE RLGC 파라미터 추출, 대한전자공학회 SOC 학술대회, 0, 0, – (2010)
시그마SPICE 멀티 코어 CPU용 병렬 모드 SPICE, 대한전자공학회 대전충남지부 학술대회, , 0, - (2009)
55 Data Rate Increase of SSTL DRAM Interface Channels by Eliminating CrosstalkInduced Jitter, 대한전자공학회 추계종합학술대회, , 0, 21-22 (2009)
An Analytic Decision Method for the Feedforward Equalizer TapCoefficients at Transmitter, ISOCC, , 0, 400-403 (2009)
A 57 Gbps Peak Detector for SerialLink, ISOCC, , 0, - (2009)
A 13uW 06V 87ENOB Successive Approximation ADC in a 018um CMOS, SYMPOSIUM ON VSLI CIRCUITS, , 0, - (2009)
A 1.3uW 0.6V 8.7-ENOB Successive Approximation ADC in a 0.18um CMOS, SYMPOSIUM ON VSLI CIRCUITS, 0, 0, - (2009)
시그마SPICE SPICE3 기반의 혼성모드 및 병렬 몬테카를로 회로 시뮬레이터, 대한전자공학회 SOC 학술대회, , 0, 440-443 (2009)
RFID Reader 용 14b 연속시간 ΔΣ AD 변환기, 한국반도체학술대회, , 0, - (2009)
An 114mW 3Gbps 018μm CMOS Digital Differential Transmitter with Calibrations of Termination and PreDriver Mismatch, 한국반도체학술대회, , 0, - (2009)
A 650Mb/s-to-8Gb/s Referenceless CDR Circuit with Automatic Acquisition of Data Rate, ISSCC, 0, 0, - (2009)
A 650Mbsto8Gbs Referenceless CDR Circuit with Automatic Acquisition of Data Rate, ISSCC, , 0, - (2009)
시그마-SPICE : 멀티 코어 CPU용 병렬 모드 SPICE, 대한전자공학회 대전충남지부 학술대회, 0, 0, – (2009)
55% Data Rate Increase of SSTL DRAM Interface Channels by Eliminating Crosstalk-Induced Jitter, 대한전자공학회 추계종합학술대회, 0, 0, 21-22 (2009)
An Analytic Decision Method for the Feed-forward Equalizer Tap-Coefficients at Transmitter, ISOCC, 0, 0, 400-403 (2009)
A 5-7 Gbps Peak Detector for Serial-Link, ISOCC, 0, 0, – (2009)
시그마-SPICE : SPICE3 기반의 혼성모드 및 병렬 몬테카를로 회로 시뮬레이터, 대한전자공학회 SOC 학술대회, 0, 0, 440-443 (2009)
An 11.4mW 3Gbps 0.18μm CMOS Digital Differential Transmitter with Calibrations of Termination and Pre-Driver Mismatch, 한국반도체학술대회, 0, 0, – (2009)
RFID Reader 용 14b 연속시간 ΔΣ A/D 변환기, 한국반도체학술대회, 0, 0, – (2009)
A 1V 28Gbps 018µm CMOS InverterBased Digital Cifferential Transmitter with Calibrations of Termination and Misnatch, ISOCC, , 0, - (2008)
A Design Guide for 3stage CMOS Nested GmC Operational Amplifier with Area or Current Minimization, ISOCC, , 0, - (2008)
A 8 GBytes Transceiver with CurrentBalanced PseudoDifferential Signaling for Memory Interface, ASSCC, , 0, - (2008)
A 8 GByte/s Transceiver with Current-Balanced Pseudo-Differential Signaling for Memory Interface, ASSCC, 0, 0, - (2008)
A TransisterBased Background SelfCalibration for Reducing PVT Sensitivity with Design Example of an Adaptive Bandwidth PLL, ASSCC, , 0, - (2008)
A 4Gbps 3bit parallel Transmitter with the CrosstalkInduced Jitter Compensation using TX Data Timing Control, ASSCC, , 0, - (2008)
A LowVoltage OP Amp with Digitally Controlled Algorithmic Approximation, CICC, , 0, - (2008)
A TimeDomain Analytic Equation of Supply Voltage Droop in CMOS Output Drivers, 한국반도체학술대회, , 0, 908-909 (2008)
A 480MHz 5phase digital DLL using current controlled delay line, 한국반도체학술대회, , 0, 743-744 (2008)
A 12V 7bit 1GSs CMOS Flash ADC with Cascaded Voting and Offset Calibration, 한국반도체학술대회, , 0, 65-66 (2008)
A 32Gbs 8b SingleEnded Integrating DFE RX for 2Drop DRAM Interface with Internal Reference Voltage and Digital Calibration, ISSCC, , 0, - (2008)
A 3.2Gb/s 8b Single-Ended Integrating DFE RX for 2-Drop DRAM Interface with Internal Reference Voltage and Digital Calibration, ISSCC2008 accepted for publication, 0, 0, 112-113600 (0000)
A 1V 2.8Gbps 0.18µm CMOS Inverter-Based Digital Cifferential Transmitter with Calibrations of Termination and Misnatch, ISOCC, 0, 0, – (2008)
A Design Guide for 3-stage CMOS Nested Gm-C Operational Amplifier with Area or Current Minimization, ISOCC, 0, 0, – (2008)
A 4Gbps 3-bit parallel Transmitter with the Crosstalk-Induced Jitter Compensation using TX Data Timing Control, ASSCC, 0, 0, – (2008)
A Transister-Based Background Self-Calibration for Reducing PVT Sensitivity with Design Example of an Adaptive Bandwidth PLL, ASSCC, 0, 0, – (2008)
A Low-Voltage OP Amp with Digitally Controlled Algorithmic Approximation, CICC, 0, 0, – (2008)
A Time-Domain Analytic Equation of Supply Voltage Droop in CMOS Output Drivers, 한국반도체학술대회, 0, 0, 908-909 (2008)
A 480MHz 5-phase digital DLL using current controlled delay line, 한국반도체학술대회, 0, 0, 743-744 (2008)
A 1.2V 7-bit 1GS/s CMOS Flash ADC with Cascaded Voting and Offset Calibration, 한국반도체학술대회, 0, 0, 65-66 (2008)
A 3.2Gb/s 8b Single-Ended Integrating DFE RX for 2-Drop DRAM Interface with Internal Reference Voltage and Digital Calibration, ISSCC, 0, 0, – (2008)
A 5Gbs 16bit Transmitter with Segmented GroupInversion Encoding, ISOCC, , 0, - (2007)
A 5Gb/s 16-bit Transmitter with Segmented Group-Inversion Encoding, ISOCC, 0, 0, - (2007)
A Serpentine Guard Trace to Reduce the Farend Crosstalk Induced Jitter of Parallel Microstrip Lines, ISOCC, , 0, - (2007)
An alldigital 90degree phaseshift DLL with loopembedded DCC for 16Gbps DDR interface, IEEE Custom Integrated Circuit Conference, , 0, 373-376 (2007)
Serpentine guard trace to reduce farend crosstalk and evenodd mode velocity mismatch of microstrip lines by more than 40, Electronic Components and Technology Conference, , 0, 329-332 (2007)
A40to800MHz Locking MultiPhase DLL, ISSCC, , 0, - (2007)
A Serpentine Guard Trace to Reduce the Far-end Crosstalk Induced Jitter of Parallel Microstrip Lines, ISOCC, 0, 0, – (2007)
An all-digital 90-degree phase-shift DLL with loop-embedded DCC for 1.6Gbps DDR interface, IEEE Custom Integrated Circuit Conference, 0, 0, 373-376 (2007)
Serpentine guard trace to reduce far-end crosstalk and even-odd mode velocity mismatch of microstrip lines by more than 40%, Electronic Components and Technology Conference, 0, 0, 329-332 (2007)
A-40-to-800MHz Locking Multi-Phase DLL, ISSCC, 0, 0, – (2007)
A 256Mb SDRAM with effectively precharged negative wordline scheme, 한국 반도체 학술 대회, , 0, 271-272 (2003)
Charge-transferred presensing and efficiently precharged negative word-line schemes for low-voltage DRAMs, SOVC, 0, 0, - (2003)
Chargetransferred presensing and efficiently precharged negative wordline schemes for lowvoltage DRAMs, Symposium on VLSI Circuits, , 0, 289-292 (2003)
A 18V 128Mb Mobile DRAM with Triple Pumped VPP Hybrid Current Sense Amplifier, 한국 반도체 학술 대회, , 0, 25-29 (2003)
A 1.0V 256Mb SDRAM with offset-compensated direct sensing and charge-recycled precharge schemes, ISSCC, 0, 0, - (2003)
A 10V 256Mb SDRAM with offsetcompensated direct sensing and chargerecycled precharge schemes, International SolidState Circuit Conference, , 0, 310-311 (2003)
A 1.8V 128Mb Mobile DRAM with Triple Pumped VPP, Hybrid Current Sense Amplifier, 한국 반도체 학술 대회, 0, 0, 275-276 (2003)
A 1.0V 256Mb SDRAM with offset-compensated direct sensing and charge-recycled precharge schemes, International Solid-State Circuit Conference, 0, 0, 310-311 (2003)
Charge-transferred presensing and efficiently precharged negative word-line schemes for low-voltage DRAMs, Symposium on VLSI Circuits, 0, 0, - (2003)
A 256Mb SDRAM with effectively precharged negative word-line scheme, 한국 반도체 학술 대회, 0, 0, 271-272 (2003)
Charge-transferred presensing and efficiently precharged negative word-line schemes for low-voltage DRAMs, Symposium on VLSI Circuits, 0, 0, 289-292 (2003)
A 1.8V 128Mb Mobile DRAM with Triple Pumped VPP, Hybrid Current Sense Amplifier, 한국 반도체 학술 대회, 0, 0, 25-29 (2003)
Double boosting pump, hybrid current sense amplifier, and binary weighted temperature sensor adjustment schemes for 1.8V 128Mb mobile DRAMs, SOVC, 0, 0, - (2002)
Double boosting pump hybrid current sense amplifier and binary weighted temperature sensor adjustment schemes for 18V 128Mb mobile DRAMs, Symposium on VLSI Circuits, , 0, 294-297 (2002)
Double boosting pump, hybrid current sense amplifier, and binary weighted temperature sensor adjustment schemes for 1.8V 128Mb mobile DRAMs, Symposium on VLSI Circuits, 0, 0, 294-297 (2002)
A 4 Gb DDR SDRAM with gaincontrolled presensing and reference bitline calibration schemes in the twisted open bitline architecture, International SolidState Circuit Conference, , 0, 378-379 (2001)
A 4 Gb DDR SDRAM with gain-controlled pre-sensing and reference bitline calibration schemes in the twisted open bitline architecture, ISSCC, 0, 0, - (2001)
A 4 Gb DDR SDRAM with gain-controlled pre-sensing and reference bitline calibration schemes in the twisted open bitline architecture, International Solid-State Circuit Conference, 0, 0, 378-379 (2001)
840 Mb/s CMOS demultiplexed equalizing transceiver for DRAM-to processor communication, SOVC, 0, 0, - (1999)
840 Mbs CMOS demultiplexed equalizing transceiver for DRAMto processor communication, Symposium on VLSI Circuits, , 0, 23-24 (1999)
Design of a microcontroller imbedded successive approximated 12bit AD converter, 한국 반도체 학술 대회, , 0, 300-301 (1999)
840 Mb/s CMOS demultiplexed equalizing transceiver for DRAM-to processor communication, Symposium on VLSI Circuits, 0, 0, 23-24 (1999)
Design of a micro-controller imbedded successive approximated 12bit A/D converter, 한국 반도체 학술 대회, 0, 0, 300-301 (1999)
Investigation of requirements for highspeed DRAM interface using RambusC as an example, ICVC, , 0, - (1997)
1Gbs current mode bidirectional IO buffer, Symposium on VLSI Circuits, , 0, 121-122 (1997)
Investigation of requirements for highspeed DRAM interface using RambusC as an example, International Conference of VLSI and CAD, , 0, 118-120 (1997)
1Gb/s current mode bi-directional I/O buffer, SOVC, 0, 0, - (1997)
1Gb/s current mode bi-directional I/O buffer, Symposium on VLSI Circuits, 0, 0, 121-122 (1997)
Investigation of requirements for high-speed DRAM interface using Rambus-C as an example, International Conference of VLSI and CAD, 0, 0, 118-120 (1997)
Investigation of requirements for high-speed DRAM interface using Rambus-C as an example, ICVC, 0, 0, – (1997)
Design of 12V 10bit cyclic AD converter using a conventional highthreshold digital CMOS technology, 한국 반도체 학술 대회, , 0, 411-412 (1996)
Design of 1.2V 10bit cyclic A/D converter using a conventional high-threshold digital CMOS technology, 한국 반도체 학술 대회, 0, 0, 411-412 (1996)
A largeslewrate fully differential folded cascode CMOS OP amp with adaptive bias, International Conference of VLSI and CAD, , 0, 59-62 (1995)
A large-slew-rate fully differential folded cascode CMOS OP amp with adaptive bias, ICVC, 0, 0, - (1995)
A large-slew-rate fully differential folded cascode CMOS OP amp with adaptive bias, International Conference of VLSI and CAD, 0, 0, 59-62 (1995)
A global minimum finding SPICE model parameter extraction program using the fast simulated diffusion algorithm with application to BSIM1, BSIM3, level3 and Gummel-Poon models, ICVC, 0, 0, - (1993)
A global minimum finding SPICE model parameter extraction program using the fast simulated diffusion algorithm with application to BSIM1 BSIM3 level3 and GummelPoon models, International Conference of VLSI and CAD, , 0, 135-138 (1993)
A global minimum finding SPICE model parameter extraction program using the fast simulated diffusion algorithm with application to BSIM1, BSIM3, level3 and Gummel-Poon models, International Conference of VLSI and CAD, 0, 0, 135-138 (1993)
A serpentine guard trace to reduce the far-end crosstalk induced jitter of parallel microstrip lines, International SoC Design Conference, 0, 0, 211-214 (0000)
A 5 Gb/s 16-bit transmitter with segmented group-inversion encoding, International SoC Design Conference, 0, 0, 223-226 (0000)
An all-digital 90-degree phase-shift DLL with loop-embedded DCC for 1.6Gbps DDR interface, IEEE Custom Integrated Circuit Conference, 0, 0, 373-376 (0000)
A 40-to-800MHz Locking Multi-Phase DLL, IEEE International Solid-State Circuit Conference, 0, 0, 306-307 (0000)
Serpentine guard trace to reduce far-end crosstalk and even-odd mode velocity mismatch of microstrip lines by more than 40%, Electronic Components and Technology Conference, 0, 0, 329-332 (0000)
First M3DIntegrated 4K ECRAM Chip with Sub100 nm Channels Achieving 100 Yield and Highly Uniform Performance for Analog AI Computing, Technical Digest International Electron Devices Meeting IEDM, , 0, - (2025)
A 208nW41fJ⋅K2 ResolutionFoM SARBased Temperature Sensor with Temperature Coefficient Amplifier, European SolidState Circuits Conference, , 0, 573-576 (2025)
DiffusionEnhanced Graph Transformer with Reinforcement Learning for Transferable Analog Circuit Optimizer, 2025 IEEEACM International Symposium on Low Power Electronics and Design (ISLPED), , 0, 1-6 (2025)
A 1042μWCh PPG Sensor with a Zoomed Sampling Based on Velocity of Blood Flow, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2025)
An 8KSpin Ising Machine IC with Reconfigurable ManyBody Spin Interactions and Limitless Multichip Extension, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2025)
A 17 pJbit 10 MHz CalibrationFree PVT Variation and Mismatch Tolerant LatchBased True Random Number Generator in 4 nm FinFET, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2025)
A CryoCMOS 64Channel Bias Generator IC for Surface Ion Trap, European SolidState Circuits Conference, , 0, 488-491 (2024)
A 00102mm2462nW ProcessSkew and Temperature Compensated Current Reference Operating from 40°C to 125°C with 297ppm°C, European SolidState Circuits Conference, , 0, 269-272 (2024)
A 243 KOPSW CryptoProcessor Supporting Homomorphic Encryption and PostQuantum Cryptography for IoT Devices, 2024 IEEE European SolidState Electronics Research Conference (ESSERC), , 0, 468-471 (2024)
A Smart Contact Lens System with 433MHz Wireless Power and Data Transfer at a Modulation Index Down to 002, Digest of Technical Papers Symposium on VLSI Technology, , 0, - (2024)
TransNet KnowledgeTransferring Analog Circuit Optimizer with a NetlistBased Circuit Representation, Proceedings Design Automation and Test in Europe DATE, , 0, - (2024)
13K Tnoise CryoCMOS Parametric Amplifier at 80 mK for Quantum Computers, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), , 0, - (2022)
A Physically Unclonable Function Combining a Process Mismatch Amplifier in an Oscillator Collapse Topology, , , 0, - (2021)
Highspeed transceiver network for invehicle communication system, , , 0, - (2020)
A 490pW SAR Temperature Sensor with a LeakageBased BandgapVth Reference, , , 0, - (2020)
A PicosecondResolution DigitallyControlled Timing Generator with OneClockLatency at Arbitrary Instantaneous Input, , , 0, - (2020)
High power triboelectric nanogenerator through the storage layer of optimized anodic aluminum oxide(AAO), The 4th International Conference on Active Materials and Soft Mechatronics, , 0, - (2019)
Rotation type triboelectric nanogenerator driven by pump drill, The 4th International Conference on Active Materials and Soft Mechatronics, , 0, - (2019)
A Spherical Hybrid Triboelectric Nanogenerator for Harvesting the Different ContactElectrification of Water Waves, The 4th International Conference on Nanoenergy and Nanosystems, , 0, - (2019)
Research of Configuration Method Considering Capillary Effect Between SolidLiquid Triboelectric Nanogenerators, The 4th International Conference on Nanoenergy and Nanosystems, , 0, - (2019)
MothEye Mimicking Triboelectric Nanogenerator for Hybrid Energy Harvesting , Nanoenergy and Nanosystems 2019, , 0, - (2019)
Increased Interfacial Area Between Dielectric Layer and Electrode of Triboelectric Nanogenerator Toward Robustness and Boosted Energy Output , Nanoenergy and Nanosystems 2019, , 0, - (2019)
마이크로 나노 구조 표면 접촉층과 전극이 일체화된 고체액체 접촉대전 나노발전기 제작법 개발, 한국군사과학기술학회 종합학술대회, , 0, - (2019)
최적화된 양극산화 알루미늄(AAO) 저장층 도입을 통한 고효율 고체고체 접촉대전 나노발전기, 한국군사과학기술학회 종합학술대회, , 0, - (2019)
USB20 용 Allsynthesizable 저 전력 전압모드 송신기 구동회로, 대한전자공학회 2018 정기총회 및 추계학술대회, , 0, - (2018)
안드로이드 스마트폰용 텐서플로우 모바일 라이브러리와 Bidirectional LSTM을 이용한 OnDevice 자동음성인식 어플리케이션, 안드로이드 스마트폰용 텐서플로우 모바일 라이브러리와 Bidirectional LSTM을 이용한 OnDevice 자동음성인식 어플리케이션, , 0, - (2018)
펌프 드릴 기반의 접촉대전 나노발전기의 제작과 응용, 한국군사과학기술학회 추계학술대회, , 0, - (2018)
파도에너지를 효율적으로 수확 가능한 구 모양 마찰대전 나노발전기, 한국군사과학기술학회 추계학술대회, , 0, - (2018)
고체액체 접촉 대전 에너지 수확 증가를 위한 전극 모양 및 배치 최적화, 한국군사과학기술학회 추계학술대회, , 0, - (2018)
나방 눈 구조를 모사한 접촉대전 나노발전기 개발 , 2018 한국군사과학기술학회 추계학술대회, , 0, - (2018)
표면 거칠기의 변화에 따른 고체액체 접촉대전 에너지 발전량 평가 및 분석, 한국정밀공학회 추계학술대회, , 0, - (2018)
A 03to12V FrequencyScalable FractionalN ADPLLwith a Speculative DualReferenced Interpolating TDC, EEE International SolidState Circuits Conference (ISSCC), , 0, - (2018)
A LowPower Wide DynamicRange Current Readout Circuit for Biosensors, ASPDAC, , 0, - (2018)
A 166pJb 150Mbs bodychannel communication transceiver with decision feedback equalization improving 200x area efficiency, ASPDAC, , 0, - (2018)
A 9.3 nW all-in-one bandgap voltage and current reference circuit using leakage-based PTAT generation and DIBL characteristic, ASP-DAC, 0, 0, - (2018)
A 93 nW AllinOne Bandgap Voltage and Current Reference Circuitusing Leakagebased PTAT Generation and DIBL Characteristic, ASPDAC, , 0, - (2018)
A 10GHz multipurpose reconfigurable builtin selftest circuit for highspeed links, SolidState Circuits Conference (ASSCC), , 0, - (2017)
An FFE TX with 38x Eye Improvement by Automatic Impedance Adaptation for Universal Compatibility with Arbitrary Channel and RX Impedances, Symp on VLSI Cir (VLSIC), , 0, - (2017)
An FFE TX with 38x Eye Improvement by Automatic Impedance Adaptation for Universal Compatibility with Arbitrary Channel and RX Impedances, Symposium on VLSI Circuits, , 0, - (2017)
A 166pJb 150Mbs Body Channel Communication Transceiver with Decision Feedback Equalization Improving 200 Area Efficiency, Symposium on VLSI Circuits, , 0, - (2017)
A 166pJb 150Mbs Body Channel Communication Transceiver with Decision Feedback Equalization Improving 200 Area Efficiency, Symposium on VLSI Circuits (VLSIC), , 0, - (2017)
A Wide Range Delay Locked Loop for DDR4, 반도체학술대회, , 0, - (2017)
A 00047mm2 Highly Synthesizable TDC and DCOless FractionalNPLL with a Seamless Lock Range off RER to 1GHz, IEEE International SolidState Circuits Conference, , 0, - (2017)
A 00047mm2 Highly Synthesizable TDC and DCOless FractionalNPLL with a Seamless Lock Range off RER to 1GHz, IEEE International SolidState Circuits Conference (ISSCC), , 0, - (2017)
A Quadrature Relaxation Oscillator with a ProcessInduced FrequencyError Compensation Loop, IEEE International SolidState Circuits Conference (ISSCC), , 0, - (2017)
A 93nW AllinOne Bandgap Voltage and Current Reference Circuit, IEEE International SolidState Circuits Conference (ISSCC), , 0, - (2017)
A TimeBased Receiver with 2Tap DFE for a 12Gbspin SingleEnded Transceiver for Mobile DRAM Interface in 08V 65nm CMOS, IEEE International SolidState Circuits Conference, , 0, - (2017)
A 93nW AllinOne Bandgap Voltage and Current Reference Circuit, IEEE International SolidState Circuits Conference, , 0, - (2017)
A Quadrature Relaxation Oscillator with a ProcessInduced FrequencyError Compensation Loop, IEEE International SolidState Circuits Conference, , 0, - (2017)
A TimeBased Receiver with 2tap DFE for a 12Gbspin SingleEndedTransceiver of Mobile DRAM Interface in 08V 65nm CMOS, IEEE International SolidState Circuits Conference (ISSCC), , 0, 400-402 (2017)
Development of a stick type compact solidwater interacting triboelectric nanogenerator, Nanoenergy and Nanosystems 2016, , 0, - (2016)
An ultralowpower biomedical chip for injectable pressure monitor, IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE, , 0, 141-144 (2015)